The Accelerator Motor Control Design Platform is an FPGA-based re-configurable signal processing architecture using soft peripherals that achieves unmatched motor control performance with feedback control loop bandwidth up to 5kHz (fig 1.)
Pre-configured Hardware Evaluation Platform with GUI shown with 400W PMAC ServoFeatures at a Glance:
Code Generation Tools with Matlab to Verilog Porter, Control Libraries, and complete FOC algorithm.
Achieving The Highest Control Loop Bandwidth
Many of today’s demanding servo motor applications such as high speed factory automation systems, and fly-by-wire/drive-by-wire vehicle control require higher levels of timing performance than ever before. Figure 4 shows how high performance servo control functions are divided into two basic parts. The hardware rich environment requires fast computation for inner loop torque control, but with relatively less memory. The software intensive environment requires a large memory area for data handling and outer loop control and timing is less critical. A single DSP or MCU using a real-time multi-tasking operating system has difficulty performing these diverse tasks in a timely manner due to all the resource multiplexing and context switching that is needed. While a high performance programmable DSP can execute an FOC loop in a 15-20microsecond period, the Accelerator FPGA-based Hardware Processor does it in 1.5-2microseconds.
The Accelerator Motor Control Design Platform leverages the advantage of configurable processors in a revolutionary new approach using a parallel hardware controller/signal processor, which achieves the bandwidth of analog control while providing the flexibility and improved performance features of digital control.
The power of the Accelerator Design Platform rests upon the convergence of three critical technologies:
At the heart of Accelerator Design Platform, the Configurable Hardware Processor contains the entire Field Oriented Control (FOC) and customized power management peripherals aimed at the time critical functions required for high performance permanent magnet, and induction machine control (Fig 5).
The Accelerator Configurable Hardware Processor avoids the bottlenecks faced by traditional microcontroller/DSP architectures with instruction based execution and multiplexed ALU’s, instead using a large number of math processing resources configured in parallel fashion to attain computational speeds more than twenty times that of traditional DSPs, and resulting in higher torque control bandwidth as shown below (based on 20kHz carrier frequency using double edge sampling Asymmetrical PWM). This improved performance also gives designers the increased power to perform multi-axis/multi-loop and advanced control strategies and allows customization of power management peripherals.
Developing Custom Motor Control Processing With Accelerator Design Platform
With the LACV101 Acclelerator Toolbox, control algorithms are designed using graphically connected control blocks instead of the traditional text editing method. Now, the servo design process revolves around control algorithm design at the system level rather than software engineering & coding techniques or design of custom peripheral ASICs. Figure 6 shows focus on system level design using the Accelerator Design Platform.
Note: Test Vector Generator Planned for Future Release
The LACV101 Accelerator Servo Toolbox contains the Control Block Library, which is a complete set of control primitives available in Simulink™, which can be expanded as needed by users who need to create unique peripheral blocks. The LACV101 diagram shows how, using Accelerator’s unique Matlab™ to Verilog Porter (MVP) tool, the Verilog code is generated, synthesized and directly downloaded into the Configurable Hardware Processor to configure the Control Engine’s functionality, relieving the designer of much manual translation or re-hosting effort.
The Verilog Library contains servo-specific, parameterized, fully tested motion peripheral circuit modules for the user to choose from. Current sensing interface module, encoder feedback module, and PWM waveform generator are examples of unique motion peripheral modules. The use of synchronous design practices throughout the Verilog library facilitates the portability of the code unlike software developed for programmable DSP’s, especially for control applications requiring precise timing due to their interrupt driven nature and their pipelined architecture.
The Accelerator design flow provides a smooth, and integrated environment using the same development platform for system level algorithm design as for control of the actual inverter hardware. Servo designers thus have the ability to perform “hardware in the loop” system evaluation with a real, industrial quality servo drive, avoiding the need for iterative bread-boarding of hardware & software (Fig. 7). The Accelerator Servo Development System provides a way for a small team to manage the complete design process while meeting the increasing demand for higher performance.
To gain access a more detailed list of products, partial datasheets, and pricing – please register at the Accelerator Development System Product Page.
In addition to these products, offers a design service for custom servo design and ASIC conversion. Contact Accelerator Sales.
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